Verification
Engineer
December 30, 2023
Valens HQ, Hod Hasharon, Israel
Verification
Full time
Applying to
Verification
Engineer
Job Description
- In charge of planning (architecture) and developing (coding) all the needed simulation environments for tests and debugs.
- The simulation environments are used to develop new RTL blocks, Full-chip integration, FPGA code and also to debug and resolve bugs found.
Job Requirements
- BSC in Electrical Engineering – from a well-known university
- At least 3 years’ experience
- Knowledge in specman – an advantage.
- Knowledge in uvm – an advantage.